In the field of amplifier circuits, there exist a number of classes of amplifier. For applications where high power audio amplification is required but where power consumption has to be low, it is known to employ so-called “class-D” amplifiers. For high power audio applications, class-D amplifiers are the most efficient of all the classes of amplifier.
A class-D amplifier circuit converts an input signal, for example an audio signal, into a sequence of pulses having an average value directly proportional to the amplitude of the input signal at the time of conversion. The frequency of the pulses is typically ten or more times the Nyquist rate. The output of the class-D amplifier therefore is a train of pulses having a characteristic that is a function of the amplitude and frequency of the input signal being amplified. One type of class-D amplifier circuit is known to comprise a Sigma-Delta modulator.
A Sigma-Delta modulator, particularly a second order Sigma-Delta modulator, comprises a first summation unit coupled to a first integrator, the first integrator being coupled to a second integrator via a second summation unit. An output of the second integrator is coupled to a quantizer, an output of the quantizer being coupled to a feedback loop. For class-D amplifier circuits, the output of the quantizer is coupled to an input of a load driver circuit. The feedback loop feeds the output of the quantizer to the first summation unit and the second summation unit. The load driver circuit is coupled to a load, for example a loudspeaker that responds audibly to the output signal of the driver circuit. In the case of the Sigma-Delta modulator, the density of the train of pulses constituting a modulated output signal is a function of the amplitude and frequency of the input signal being processed, i.e. the output signal of the quantizer is a Pulse Density Modulation (PDM) signal. The output signal of the load driver circuit is therefore also a modulated signal.
Undesirably, the PDM output signal contains, in addition to the input signal information, unwanted spectral components. In particular, traditional class-D amplifier circuits including Sigma-Delta modulators suffer from the presence of harmonic distortions in the output signal as well as DC offset and an increase in the so-called “noise floor”.
In particular, and in relation to switched capacitor (“switch-cap”) implementations of the Sigma-Delta modulator, the output signal of the load driver circuit is processed by the load as a square wave including “spikes”, but the switched capacitor integrators process the output signal as a substantially perfect square wave. This results in the output signal containing odd-order harmonic distortions as well as a Direct Current (DC) offset. Additionally, due to rise time/fall time mismatches due to field effect devices of the output driver circuit not being perfectly matched, the output signal also contains even-order harmonic distortions. Also, as a result of so-called “clock jitter”, the noise floor of the output signal is further increased. Whilst the clock jitter can be obviated or at least mitigated, the solution requires an expensive very low phase noise Phase Locked Loop (PLL) to supply the clock signal for the Sigma-Delta modulator as well as the provision of bulky devices external to an integrated circuit containing the Sigma-Delta modulator.
Patent Cooperation Treaty publication no. WO 2006079869 A relates to a class-D amplifier circuit that feeds the output of the driver circuit back to the first and second integrators instead of the output of the quantizer. Whilst this circuit architecture mitigates noise caused by the power supply to the amplifier circuit, DC offset and harmonic distortions of the type described above are still present in the output signal. Also, noise resulting from clock jitter is still present in the output signal.